1. Field of the Invention
The present invention generally relates to a semiconductor device, and more particularly to a semiconductor integrated circuit improved to reduce a leakage current of a transistor. The present invention also relates to a manufacturing method of such a semiconductor device.
2. Description of the Background Art
Conventionally, a LOCOS oxide film has been used to determine a gate width of a gate electrode of a transistor.
FIG. 10 is a top plan view of a transistor having a gate electrode with its gate width determined by such a LOCOS oxide film. FIG. 11 is a cross sectional view taken along the line XIxe2x80x94XI in FIG. 10.
Referring to FIGS. 10 and 11, an n well 2 and a p well 3 are provided in the main surface of a semiconductor substrate 1. A first gate electrode 5 is disposed on n well 2, with a gate oxide film 4 interposed therebetween. A second gate electrode 7 is disposed on p well 3, with a gate oxide film 6 interposed therebetween. A gate width W1 of first gate electrode 5 is determined by a LOCOS oxide film 8. A gate width W2 of second gate electrode 7 is also determined by LOCOS oxide film 8. A pair of p type source/drain layers 9 are disposed on the surface of semiconductor substrate 1, on both sides of first gate electrode 5 in the gate length direction Y. A pair of n type source/drain layers 10 are disposed on the surface of p well 3, on both sides of second gate electrode 7 in gate length direction Y. N well 2 is supplied with a potential of VDD via a body contact region 11, and p well 3 is grounded via a body contact region 12.
FIG. 12 is a cross sectional view of a transistor that is formed using a SOI (Silicon On Insulator) substrate. This transistor is identical to the transistor shown in FIG. 11, except that it employs the SOI substrate as its semiconductor substrate. Thus, the same or corresponding portions are denoted by the same reference numbers, and description thereof will not be repeated.
Note that the SOI substrate is a semiconductor substrate 1 with a silicon oxide film 13 buried therein.
FIG. 13 is a cross sectional view of a semiconductor device in which the gate width of a gate electrode is determined by a field shield, instead of determined by the LOCOS oxide film. Otherwise, its structure is identical to that of the conventional device shown in FIG. 11, and thus, the same or corresponding portions are denoted by the same reference numbers, and description thereof is not repeated.
FIG. 14 is a cross sectional view of a semiconductor device in which both the SOI substrate and the field shield are used in combination. Otherwise, it has the same structure as in the conventional device shown. in FIG. 11, and thus, the same reference numbers denote the same or corresponding portions, and description thereof is not repeated.
Now, a manufacturing method of the conventional semiconductor device shown in FIG. 11 will be described.
Referring to FIGS. 10 and 11, LOCOS oxide film 8 is formed on the surface of semiconductor substrate 1 by photolithography and a LOCOS method.
Thereafter, Nxe2x88x92 channel doping (e.g., with P, As) is performed to form n well 2, by photolithography and ion implantation. Pxe2x88x92 channel doping (with B, for example) is then performed to form p well 3 on the surface of semiconductor substrate 1, by photolithography and ion implantation. A gate oxide film and a gate electrode film are then formed, and the unnecessary films are removed by photolithography and etching, leaving the gate pattern. Gate oxide films 4, 6 and gate electrodes 5, 7 are thus formed.
A pair of p type source/drain layers 9 are formed on both sides of first gate electrode 5 in the gate length direction Y, by photolithography and ion implantation. A pair of n type source/drain layers 10 are formed on both sides of second gate electrode 7 in the gate length direction Y, by photolithography and ion implantation. A transistor with its gate width determined by LOCOS oxide film 8 is obtained through the above-described process.
The conventional semiconductor device and manufacturing method thereof have been configured as described above. Therefore, referring to FIG. 11, when forming LOCOS oxide film 8, a so-called bird""s beak is formed on its end. The Nxe2x88x92 or Pxe2x88x92 channel doping results in a lightly doped portion immediately beneath such a bird""s beak. To avoid this, semiconductor substrate 1 is often set askew at the time of channel doping, so as to prevent impurity concentration in this region from lowering. However, these impurities may be absorbed into the oxide film when heated in a subsequent process, which will result in lowered impurity concentration. Consequently, the threshold value of the transistor will be decreased, and the leakage current will be produced at the edge of the transistor.
Such increase in leakage current is considerable especially in the SOI device employing the SOI substrate as its semiconductor substrate, as shown in FIG. 12. More specifically, since the bird""s beak region is sandwiched between LOCOS oxide film 8 and buried oxide film 13, a large amount of impurities are absorbed into those oxide films 8 and 13, and thus, the threshold value is considerably decreased, resulting in a significant increase in the leakage current.
One way to determine the gate width of a transistor while avoiding the formation of birds"" beaks is to employ a field shield isolation 14, as shown in FIG. 13. When this technique is employed, however, gate electrodes 5, 7 are formed to have stepped structures, which may result in disconnection in the gate electrodes. In addition, the number of process steps increases with this technique.
Similar problems have been seen with the structure employing both the SOI substrate and the field shield isolation as shown in FIG. 14. Note that the same or corresponding portions in the above figures are denoted by the same reference numbers, and description thereof is not repeated.
The present invention is directed to solve the above-described problems. An object of the present invention is to provide a semiconductor device improved to reduce a leakage current of a transistor.
Another object of the present invention is to provide a manufacturing method of a semiconductor device improved to reduce the process steps.
The semiconductor device according to a first aspect of the present invention includes a semiconductor substrate. A gate electrode is provided on the semiconductor substrate. A pair of source/drain layers of the first conductivity type are disposed on the surface of the semiconductor substrate, on both sides of the gate electrode in the gate length direction. A gate width determining layer of the second conductivity type is disposed on the surface of the semiconductor substrate, which determines the gate width of the gate electrode. This gate width determining layer is disposed to sandwich the source/drain layers in the width direction of the gate electrode. The source/drain layers and the gate width determining layer are isolated by PN junction.
The semiconductor device according to the present invention has a structure that requires no LOCOS oxide film. Therefore, there occurs no impurity diffusion into the oxide films, or no bird""s beak is produced. Accordingly, it is possible to suppress the leakage current.
According to a second aspect of the present invention, the semiconductor device is provided with a silicide prevention film on the semiconductor substrate, continuously on and along the boundary of the PN junction, to prevent formation of silicide thereunder.
According to the present invention, a reverse bias portion of PN junction is not silicified, and thus, there occurs no short between the power supply and the ground through the silicide.
According to a third aspect of the present invention, the semiconductor device is provided with a first conductivity type source/drain layer and a second conductivity type source/drain layer, disposed adjacent to each other. The semiconductor device includes a semiconductor substrate. A first gate electrode and a second gate electrode are disposed on the semiconductor substrate, adjacent to each other in their gate width direction. A pair of the first conductivity type source/drain layers are disposed on the surface of the semiconductor substrate, on both sides of the first gate electrode in the gate length direction. A first gate width determining layer of the second conductivity type for determining the gate width of the first gate electrode is disposed on the surface of the semiconductor substrate to sandwich the first conductivity type source/drain layers in the width direction of the first gate electrode. A pair of the second conductivity type source/drain layers are disposed on the surface of the semiconductor substrate, on both sides of the second gate electrode in the gate length direction. A second gate width determining layer of the first conductivity type for determining the gate width of the second gate electrode is disposed on the surface of the semiconductor substrate to sandwich the second conductivity type source/drain layers in the width direction of the second gate electrode. An oxide film is disposed on the surface of the semiconductor substrate, which isolates the first gate width determining layer from the second gate width determining layer.
According to the present invention, the NMOSFET and the PMOSFET can be isolated by the LOCOS oxide film. Therefore, it becomes possible to prevent a PN junction reverse bias current as well as a latch-up structure of PNPN.
The semiconductor device according to a fourth, fifth, or sixth aspect of the present invention has a SOI substrate as the semiconductor substrate.
According to the present invention, the leakage current can be prevented even when the SOI substrate is used.
In the manufacturing method of a semiconductor device according to a seventh aspect of the present invention, impurity ions of the first conductivity type are first introduced in the surface of the semiconductor substrate to form an impurity layer extending in a horizontal direction. A gate electrode is formed on the semiconductor substrate. Impurity ions of the second conductivity type are introduced selectively in a predetermined gate width region on both sides of the gate electrode in the gate length direction. Thus, a pair of source/drain layers of the second conductivity type are formed on both sides of the gate electrode in the gate length direction. A gate width determining layer of the first conductivity type for determining the gate width of the gate electrode is also formed, which sandwiches the source/drain layers of the second conductivity type in the gate width direction and is isolated from the source/drain layers of the second conductivity type by PN junction.
According to the present invention, no LOCOS oxide film is used as a means to determine the gate width of gate electrode. Therefore, there occurs no impurity diffusion into the oxide films, or no bird""s beak is formed. Thus, the leakage current can be suppressed.
In the manufacturing method of a semiconductor device according to an eighth aspect of the present invention, a silicide prevention film is formed on the semiconductor substrate, continuously on and along a boundary of the gate width determining layer of the first conductivity type and the source/drain layers of the second conductivity type, to prevent formation of silicide thereunder. The surface of the semiconductor substrate is silicified using the silicide prevention film as a mask.
According to the present invention, the silicide prevention film is formed on the semiconductor substrate, continuously on and along the boundary of the first conductivity type impurity layer and the second conductivity type source/drain layer. Therefore, short between the power supply and the ground can be prevented, even in the case where the surface of the semiconductor substrate is silicified thereafter.
In the manufacturing method of a semiconductor device according to a ninth aspect of the present invention, an oxide film is formed in the surface of the semiconductor substrate to separate the surface into a first surface and a second surface. Impurity ions of the first conductivity type are introduced in the first surface of the semiconductor substrate to form an impurity layer extending in a horizontal direction. Impurity ions of the second conductivity type are introduced in the second surface of the semiconductor substrate to form an impurity layer extending in a horizontal direction. A first gate electrode is formed on the first surface of the semiconductor substrate and a second gate electrode is formed on the second surface of the semiconductor substrate. Impurity ions of the second conductivity type are introduced selectively in a predetermined gate width region on both sides of the first gate electrode in the gate length direction to form a pair of source/drain layers of the second conductivity type on both sides of the first gate electrode in the gate length direction. A gate width determining layer of the first conductivity type for determining the gate width of the first gate electrode is also formed, which sandwiches the source/drain layers of the second conductivity type in the gate width direction and is isolated from the source/drain layers of the second conductivity type by PN junction. Impurity ions of the first conductivity type are introduced selectively in a predetermined gate width region on both sides of the second gate electrode in the gate length direction to form a pair of source/drain layers of the first conductivity type on both sides of the second gate electrode in the gate length direction. A gate width determining layer of the second conductivity type for determining the gate width of the second gate electrode is also formed, which sandwiches the source/drain layers of the first conductivity type in the gate width direction and is isolated from the source/drain layers of the first conductivity type by PN junction.
According to the present invention, the NMOSFET and the PMOSFET are isolated by the LOCOS isolation. Therefore, a PN junction reverse bias current can be prevented, and further, a latch-up structure of PNPN can be prevented.
According to a tenth, eleventh, or twelfth aspect of the present invention, the manufacturing method of a semiconductor device utilizes a SOI substrate as the semiconductor substrate.
With the method according to those aspects, a transistor that is capable of preventing a leakage current can be obtained even when the SOI substrate is used.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.